Towards a Cryogenic CMOS-Memristor Neural Decoder for Quantum Error Correction
To address the urgent need for real-time, ultra-low-power decoding in quantum error correction, this work presents a neuromorphic decoder chip designed for cryogenic operation at 1.2 K. The chip integrates 180-nm CMOS with metal-oxide memristors in an in-memory computing architecture. It demonstrates, for the first time at 1.2 K, stable analog sigmoid and threshold activation functions, as well as reliable spiking responses, using memristive crossbar arrays. The design supports a fully analog three-layer neural decoding structure—input–recurrent–output—and exhibits functional consistency across a broad temperature range (300 K to 1.2 K). Experimental results confirm that activation function shape, spiking dynamics, and power consumption retain room-temperature-level stability at cryogenic temperatures. This work establishes the first viable cryogenic integrated circuit solution for scalable, ultra-low-power, real-time hardware decoding in quantum error correction.