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Velosiraptor: Code Synthesis for Memory Translation

Aug 08, 2026

This work addresses the inefficiency and security risks associated with manually crafting configuration code when operating systems are frequently adapted to emerging memory hardware. It presents the first application of domain-specific software synthesis to the generation of operating system memory management code. By leveraging high-level formal specifications that capture both the memory hardware’s mapping behavior and the OS execution environment, the approach automatically synthesizes verifiable low-level code along with corresponding hardware components. This methodology substantially improves development productivity and system security, enables seamless porting of operating systems to novel hardware platforms, and provides a robust and efficient implementation foundation for exploring new address translation mechanisms.

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Velosiraptor: Code Synthesis for Memory Translation

Aug 08, 2026

This work addresses the inefficiency and security risks associated with manually crafting configuration code when operating systems are frequently adapted to emerging memory hardware. It presents the first application of domain-specific software synthesis to the generation of operating system memory management code. By leveraging high-level formal specifications that capture both the memory hardware’s mapping behavior and the OS execution environment, the approach automatically synthesizes verifiable low-level code along with corresponding hardware components. This methodology substantially improves development productivity and system security, enables seamless porting of operating systems to novel hardware platforms, and provides a robust and efficient implementation foundation for exploring new address translation mechanisms.

0 citationsRead paper